Notes, summaries, assignments, exams, and problems for Computers

Binary Parallel Adder

A binary parallel adder is a digital circuit that adds two binary numbers in parallel, meaning all bits are added simultaneously. It typically consists of full adders arranged in parallel, with each full adder adding corresponding bits from the two input numbers.

BCD Adder

A BCD (Binary Coded Decimal) adder is a specific type of binary parallel adder designed to add two BCD numbers. BCD numbers are decimal digits encoded in binary, where each decimal digit is represented by its 4-bit binary equivalent.

Truth Table for a 4-bit BCD Adder

Here's the truth table for a 4-bit BCD adder:

Diagram

In the truth table:

• A3 A2 A1 A0 represents the first BCD number (A).
• B3 B2 B1 B0 represents the second BCD number (B).
• Cin represents the carry-

Essential Algorithms and Data Structures

Longest Increasing Subsequence (LIS):

• Subproblem: dp[i] = length of LIS ending at index i
• Recursion: dp[i] = max(dp[j] + 1 for j < i and arr[j] < arr[i])
• Base case: dp[i] = 1 (every element is a subsequence of length 1)
• Time Complexity: O(n^2), O(n log n) with binary search optimization.

Longest Alternating Subsequence (LAS):

• Subproblem: dp[i][0] (increasing), dp[i][1] (decreasing)
• Recursion: dp[i][0] = max(dp[j][1] + 1 for j < i and arr[j] < arr[i]), dp[i][1] = max(dp[j][0] + 1 for j < i and arr[j] > arr[i])
• Base case: dp[0][0] = 1, dp[0][1] = 1
• Time Complexity: O(n^2)

0/1 Knapsack Problem:

• Subproblem: dp[i][w] = maximum value for the first i items and weight limit w
• Recursion: dp[i][w] = max(

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Finding the Basis of a Row Space

The easiest way to find the basis of a row space is to reduce matrix A to Reduced Row Echelon Form (RREF). The nonzero row vectors of R (which contain the leading 1s, or pivots) form a basis for row(A).

Finding the Basis of the Kernel

The following four steps outline the most effective method for finding a basis for null(A):

1. Reduce A to RREF (R): Find the Reduced Row Echelon Form (R) of the matrix A.
2. Solve the Homogeneous System: Use the RREF, R, to solve the equivalent homogeneous system Rx=0.
3. Identify and Parameterize Variables:
   • Identify the leading variables (those corresponding to columns containing a leading 1 or pivot in the RREF) and the free variables.
   • Solve for the leading variables in terms of the free variables.

Bisection Method Implementation

#include <stdio.h>
#include <math.h>

#define f(x) (cos(x) - (x * exp(x)))

int main() {
    float x0, x1, x2, f0, f1, f2, e;
    int step = 1;

    /* Inputs */
    up:
    printf("\nEnter two initial guesses:\n");
    scanf("%f%f", &x0, &x1);
    printf("Enter tolerable error:\n");
    scanf("%f", &e);

    f0 = f(x0);
    f1 = f(x1);

    if (f0 * f1 > 0.0) {
        printf("Incorrect Initial Guesses. Try again.\n");
        goto up;
    }

    printf("\nStep\t\tx0\t\tx1\t\tx2\t\tf(x2)\n");
    do {
        x2 = (x0 + x1) / 2;
        f2 = f(x2);
        printf("%d\t\t%f\t%f\t%f\t%f\n", step, x0, x1, x2, f2);

        if (f0 * f2 < 0) {
            x1 = x2;
            f1 = f2;

Computer Architecture vs. Computer Organization

IEEE 754 Floating Point Bias

• Single Precision (32-bit): Bias = 127 (2⁷ - 1)
• Double Precision (64-bit): Bias = 1023 (2¹⁰ - 1)

Why Bias is Used

Bias allows storing both positive and negative exponents using only unsigned integers. Instead of storing the actual exponent, we store (exponent + bias), which is always positive. This simplifies the comparison of floating-... Continue reading "Computer Architecture and Organization Fundamentals" »

TCP Reliable Transfer and Connection Management

TCP Reliable Transfer

1. Sequence Numbers

   • Each byte of data is assigned a sequence number. This number is used by the receiver to correctly order the data and ensure there are no missing segments.

2. Acknowledgements

   • The receiver sends back an ACK to the sender for the sequence number of the next expected byte. If the sender receives the ACK before its timer expires, it knows everything up to that byte was received correctly.

3. Retransmission

   • If the ACK is not received before the timer expires, the sender retransmits the data.

TCP Connection Management

Managing a TCP connection begins with a three-way handshake, which establishes a connection before any actual data is transmitted.

Steps in Three-Way Handshake

1. SYN

   • The

Chapter 5: Synchronization

Critical Section Conditions

• Mutual Exclusion: Only one process may be in the critical section at a time.
• Progress: If the critical section is empty, some waiting process can enter.
• Bounded Waiting: No starvation; each process waits a bounded number of turns.

Atomic Instructions

• Test-and-Set: old = *b; *b = TRUE; return old
• Swap: temp = *a; *a = *b; *b = temp

Spinlocks

• TAS:

  bool m = false;
  lock() { while (TestAndSet(&m)); }
  unlock() { m = false; }
  

• Swap:

  bool m = false;
  lock() { bool key = true; while (key) Swap(&m, &key); }
  unlock() { m = false; }
  

Semaphores

• wait(S): S.val--; if S.val < 0 block
• signal(S): S.val++; if S.val <= 0 wake one
• Binary semaphore as mutex: init = 1; lock = wait; unlock = signal

Peterson's

This implementation demonstrates how to find the shortest path from a source node to all other nodes in a graph using Dijkstra's Algorithm.

Core Components

• minDist: Identifies the node with the minimum distance not yet included in the shortest path tree.
• print: Displays the calculated shortest distances from the source.
• dijkstra: The primary logic that updates distances based on the adjacency matrix.

import java.util.*;

public class Main {
    static int V;

    // Find the node with the minimum distance not yet in the shortest path tree
    int minDist(int dist[], Boolean boolset[]) {
        int min = Integer.MAX_VALUE, min_value = -1;
        for (int i = 0; i < V; i++) {
            if (!boolset[i] && dist[i] <= min) {

1. JK Flip-Flop Operation and Truth Table

Logic Diagram:

Working Principle

The JK flip-flop is an enhanced version of the gated SR flip-flop. It incorporates clock input circuitry to eliminate the invalid output condition that occurs when both S and R inputs are logic level "1".

Because of the added clock input, the JK flip-flop offers four distinct input combinations:

• Logic "1" (Set)
• Logic "0" (Reset)
• No Change
• Toggle

The S and R inputs of the preceding SR bistable are replaced by J and K inputs, named after its inventor, Jack Kilby. Thus, J = S and K = R.

The two 2-input AND gates in the gated SR bistable are replaced by two 3-input NAND gates. The third input of each NAND gate connects to the outputs Q and $\bar{Q}$. This cross-coupling allows the... Continue reading "Digital Electronics Concepts: Flip-Flops, Registers, and Converters" »