Operational Amplifier Circuits and Waveform Generators

Inverting and Non-Inverting Comparators

In an inverting comparator, the input signal is applied to the inverting input terminal. When asymmetrical power supplies are used, the output voltage behavior is defined as:

• V_o = +V_sat if V_i < V_r
• V_o = -V_sat if V_i > V_r

A non-inverting comparator operates in reverse, driving the output positive when the input exceeds the reference voltage.

Schmitt Trigger (Hysteresis Comparator)

An inverting comparator with hysteresis utilizes positive feedback (connecting resistors R₁ and R₂ to the non-inverting input terminal V⁺ and the feedback path). The circuit equations are:

• Current: I = (V_ref - V_o) / (R₁ + R₂)
• Threshold Voltage: V⁺ = V_ref - I · R₁ = V_ref + (V_o - V_ref) · R₁ / (R₁ + R₂)

The switching interval is defined by the hysteresis voltage V_H = V_iH - V_iL, establishing the upper and lower input voltage transition levels at which V_o toggles. The non-inverting hysteresis comparator operates with opposite polarity.

Window Comparator Circuit

A window comparator consists of two inverting comparators feeding into a summing amplifier with an inverting gain of -1. The output becomes active when the input voltage lies within a defined voltage window (V_Lref, V_ref).

Assuming R₁ = R₂ = R₃ = R₄ and V_o = V₂ - V₁:

• If V_i < V_Lref: V₁ = +V_sat and V₂ = +V_sat, resulting in V_o = 0.
• If V_i > V_ref: both comparators switch to -V_sat.
• If V_Lref < V_i < V_ref: V_o = 2V_sat.

Precision Half-Wave Rectifier Circuits

A half-wave diode rectifier (superdiode) connects a diode in series with a load resistor:

• For V_i > 0: V_o = V_i
• For V_i < 0: V_o = 0

For proper circuit operation, the op-amp open-loop gain overcomes the diode forward voltage drop. An improved two-diode configuration provides enhanced switching:

• When V_i > 0: Diode D₂ is OFF, Diode D₁ is ON, and V_o = 0.
• When V_i < 0: Diode D₁ is ON, Diode D₂ is OFF, and V_o = -V_i.

Precision Full-Wave Rectifier

A precision full-wave rectifier provides an absolute value transfer function:

V_o = (R_L / R₁) · |V_i|

When R_L = R₁, the output is directly proportional to the magnitude: V_o = |V_i|.

Peak Detector Circuit

The peak detector incorporates an input diode, a parallel holding capacitor C, and a discharge resistor R:

• When V_i > 0 and exceeds the stored peak, the diode conducts, charging the capacitor to track the input peak (V_o > 0).
• When V_i drops below the peak voltage, the diode becomes reverse-biased and stops conducting. The capacitor holds the stored peak voltage.

Diode and Zener Voltage Limiters

A voltage limiter (clipper) incorporates a feedback resistor R₂ in parallel with diode configurations:

• A diode in series with a DC bias in the feedback loop limits the output voltage to a specified threshold. Placing the diode forward produces a positive limiter; reversing the diode creates a negative limiter.
• Using two back-to-back Zener diodes connected in series opposition limits both positive and negative peak levels, maintaining a proportional linear output V_o relative to V_i within the threshold limits.

Sinusoidal Oscillators and Criteria

A sinusoidal oscillator generates variable AC voltages from a DC supply without requiring external variable inputs. It comprises two primary sections:

1. Feedback Network: Sets the frequency of oscillation.
2. Amplifier Stage: Requires high input impedance (Z_in), often combining FETs and op-amps.

According to the Barkhausen criterion, sustained oscillations require the loop gain magnitude to reach at least 1 with a net phase shift of 0° (or 360°).

Tuned LC and Crystal Oscillators

LC tuned oscillators operate at high frequencies and rely on tank resonance. The oscillation frequency corresponds to the resonant frequency: f = 1 / (2π√(LC)). LC oscillators are commonly configured in standard topologies such as Hartley or Colpitts arrangements.

Crystal oscillators operate from 4 kHz up to 10 MHz. Utilizing quartz crystals provides superior frequency stability compared to conventional LC networks.

Astable Multivibrator Circuits

An op-amp astable multivibrator produces a rectangular wave signal:

• Output amplitude limits are stabilized by two back-to-back Zener diodes in series opposition.
• The non-inverting terminal (+) features a resistive voltage divider that feeds back a reference threshold proportional to the output.
• The inverting terminal (-) is driven by an RC network that continuously charges and discharges the timing capacitor C.

Triangular Waveform Generator

A triangular wave generator consists of two cascaded stages:

1. Schmitt Trigger Stage: Generates a rectangular wave signal that drives the subsequent integrator.
2. Integrator Stage: Generates a linear ramp signal from the rectangular input and feeds back into the Schmitt trigger.

Operation: When the Schmitt trigger output is high (+V_sat), the integrator produces a descending ramp. Once the lower trigger threshold is reached, the Schmitt trigger flips, driving the integrator to produce an ascending ramp.

555 Timer Astable Multivibrator

In 555 astable mode, continuous triggering is sustained using internal comparator references:

• When the capacitor voltage drops below 1/3 V_CC, the lower comparator output goes high, setting the internal flip-flop, turning OFF the discharge transistor, and causing the capacitor to charge.
• When the capacitor voltage exceeds 2/3 V_CC, the upper comparator output switches high, resetting the flip-flop, which turns ON the discharge transistor to rapidly discharge capacitor C.

555 Timer Monostable and VCO Operation

In monostable / voltage-controlled oscillator (VCO) configurations, the control voltage pin (pin 5) is connected to an external variable voltage or variable resistor. This modifies the internal 2/3 V_CC threshold, thereby modulating the timing period and output frequency through controlled capacitor charge and discharge rates.