Notes, summaries, assignments, exams, and problems for Computers

Internal transport

Refers to the physical movement of products inside loading/unloading areas, docks, order preparation zones, truck load and any other eventual activity that implies products movements inside the warehouse.

Horizontal transport:

On this type of transport merchandise do not need to be raised to locate in a determined place. (Pallet truck, roller conveyor, conveyor belt system, auto guide transport system).

Vertical transport:

This transport not just allows the product to be transported from one place to another, but also to be raised to locate in a specific place. (Conventional forklift, retractable forklift, trilateral forklift).

Conventional forklift/truck lift (“Toros”)

Could be fixed mast or counterbalance, they need from 3... Continue reading "Internal Transport and Storage Systems in Warehouses" »

Sorted Linked List Insertion

The following method, insertAtSorted(T x), demonstrates how to insert an element into a sorted linked list while maintaining the correct order.

public void insertAtSorted(T x) {
    if (this.length == 0) {
        this.firstNode = nn;
        this.lastNode = nn;
    } else if (((Comparable)x).compareTo(this.firstNode.data) < 0) {
        nn.next = this.firstNode;
        this.firstNode = nn;
    } else {
        SNode<T> curr = this.firstNode;
        while (((Comparable)x).compareTo(curr.next.data) >= 0) {
            curr = curr.next;
        }
        nn.next = curr.next;
        curr.next = nn;
    }
    this.length++;
}

Priority Queue Enqueue Implementation

The enqueuer method handles inserting items... Continue reading "Java Data Structures: Sorted Lists and Hash Tables" »

Drawbacks of Classful Addressing

Subnets have a fixed number of host addresses, leading to many unused/wasted IP addresses.

Solutions for IP Address Shortages

Short-term: Classless addressing
Long-term: IPv6

CIDR (Classless Inter-Domain Routing)

CIDR uses a hierarchical addressing scheme based on VLSM (Variable Length Subnet Masking).

Advantages of CIDR

• Replaces classful addressing with a more flexible and less wasteful classless scheme.
• Enhances route aggregation.

How VLSM Works

VLSM further subnets existing subnets by taking bits from the host ID, creating a multi-level hierarchy with "sub-subnets."

Supernetting

Supernetting combines continuous network addresses into a new address defined by the subnet mask. Multiple networks are combined into a larger... Continue reading "Understanding CIDR, Subnetting, and Supernetting in IP Addressing" »

Verifying Text Summaries of Relational Data Sets

AggChecker

int opcion=0;

double cantidad, vuelto;

double pago, total = 0;

string[,] fruta = { { 'Manzana', '4.9' }, { 'Pera', '5.5' }, { 'Naranja', '8.6' }, { 'Platano', '2.7' } ,{ 'Fresa', '1.9' } ,{ 'Piña', '2.4' }, { 'Papaya', '4.2' }, { 'Sandia', '3.4' } ,{ 'Durazno', '3.5' } };

String[,] añaFruta = newString[50, 5];

int i=0, j=0;

int añadir = 0,tFruta=0;

do{

do{

i = 0;

Console.Write('_________________________ ' +

'FRUTERIA .... '+

'1) AÑADIR FRUTA. ');

while (i < 9)

{ Console.Write(i+2+') '+fruta[i,0]+' ');

i++;

}

if(añadir>0)

{j = 11;

i = 0;

tFruta = añadir+9;

while (i < añadir)

{Console.Write(j + ') ' + añaFruta[i, 0] + ' ');

j++;i++;

}

}

else { tFruta = 9; }

Console.Write(tFruta + 2+') Pagar. ');

opcion = int.Parse(Console.ReadLine(

Internet Architecture and Core Protocols

The Three Layers of Internet Architecture

The internet architecture can be broadly classified into three layers:

1. Internet Backbones and High-Speed Network Lines: This first layer consists of Internet Backbones and very high-speed network lines. The National Science Foundation (NSF) created the first high-speed backbone in 1987 called NSFNET. It was a T1 line that connected 170 smaller networks together and operated at 1.544 Mbps (million bits per second). IBM, MCI, and Merit worked with NSF to create the backbone and developed a T3 (45 Mbps) backbone the following year. Backbones are typically fiber optic trunk lines. The trunk line has multiple fiber optic cables combined together to increase capacity.

Computer System

Components:

• CPU
• Memory (ROM/RAM)
• I/O unit

BCD (Binary-Coded Decimal)

• Add 0110 to the result if it falls between 1010 and 1111.

Overflow

• Occurs when both numbers being added are positive or negative, and the result exceeds the maximum representable value.

IEEE-754 Standard

• 32 bits: 1 sign bit, 8 exponent bits, 23 mantissa bits
• NAN (Not a Number): Represents an error, exponent with all 1s and a sign bit of 0.
• Always add trailing zeros to complete the required number of bits.

Decoder

• Converts input to output using 2^n AND gates.

Memory

• Components: Address, data, enable, read, write

Control Unit

• Hardware instruction logic
• Decodes and monitors the execution of instructions.

ALU (Arithmetic Logic Unit)

• Performs numerical and logical evaluations.
• Receives

Abstraction

• Application Analysis: The class or object model extracts the essential features of a real-world class or object.
• Software Design: The public interface supports a simple logical model, while implementation complexity remains hidden from the client view.

Modularity

• Application Analysis: Objects provide a more expressive and fine-grained structuring capability than decomposition by processing activity alone.
• Software Design: Objects are information clusters that can be declared as often and wherever needed.

Encapsulation

• Classes build “firewalls” around objects, forcing all access through public interfaces and preventing access to private implementation.
• Objects intercept errors before they propagate outward throughout the system.

Data Transfer Instruction:

LEA

Gets source effective address and stores it in the target. Source segment address is stored in DS. Example: LEA DX, OPERANDO1

Control Transfer Instructions

Loops

Operation (IP decrement) + Conditional jump on operation result.

Example:

MOV CX, 4
Bucle:
  INC BX
  ADD BX, CX
  LOOP Bucle

Compare Instruction:

CMP

Compares source and target operands and properly modifies the flag register. It internally works by subtracting the target from the source operand. Operands are equal if the result is zero. Source is greater than target if the result is negative. Target is greater than source otherwise. Example: CMP AX, DX; Compares AX and DX.

Interrupt Instructions:

INT

INT jumps to a specified interrupt address. i8086 interrupt addresses... Continue reading "Assembly Language Instructions and MS-DOS Functions" »