Notes, summaries, assignments, exams, and problems for Computers

Memory Management Problems and Solutions

Deadlock Scenario

A system has four processes and five allocable resources. The current allocation and maximum needs are as follows:

What is the smallest value of x for which this is a safe state?

The needs matrix is as follows:

• 0 1 0 0 1
• 0 2 1 0 0
• 1 0 3 0 0
• 0 0 1 1 1

If x is 0, we have a deadlock immediately. If x is 1, process D can run to completion. When D is finished, the available vector is 1 1 2 2 1. Now, A has ‘10211’ and ‘11221’ is available which together satisfies maximum need. So, A is finished and now ‘2 1 4 3 2’ is available, which can satisfy C. Once C is done, the available resources are 3 2 4 4 2, which can help B finish. So, x =1 will do.

Memory Compaction

A swapping system eliminates... Continue reading "Memory Management: Algorithms and Techniques" »

5. A machine has a 32-bit address space and an 8-KB page. The page table is entirely in hardware, with one 32-bit word per entry. When a process starts, the page table is copied to the hardware from memory, at one word every 100 nsec. Lf each process runs for 100 msec (including the time to load the page table), what fraction of the CPU time is devoted to loading the page tables?

The page table contains 232 /213 entries, which is 524,288.  Loading the page table takes 52 msec. If a process gets 100 msec, this consists of 52 msec for loading the page table and 48 msec for running. Thus 52% of the time is spent loading page tables.

6. Suppose that a machine has 48-bit virtual addresses and 32-bit physical addresses. If pages are 4 KB, how many... Continue reading "Understanding Paging and Virtual Memory in Computer Architecture" »

Traffic Server Client Request and Response API Functions

This document describes the Traffic Server API functions related to client requests and responses.

Client Request Functions

Loop Invariant:

Big-Theta, Big-Oh, Big-Omega

The application of several binary codes in microprocessor technique

Nbà + integer arithmetic, table/matrix indexing, event counting., C2à integer arithmetic, exponents in floating point notation.,Bcdà Faults:not effetive use of binary Word, absence of sign., Grayà code disksor bars to control position of moving elements., AScià Communication(text), service of: mosaic display, printers, autonomous keyboards.

Neuman:

It has a single storage system, Processor needs two clocks cycles. Dont use pipeline, Only one bus is used for both data transfers, older

Harvards:

It has two separated memories, 1 cycle if appropiate pipeling strategies, It has separate data and instruction busses, modern

Enumerate the phases of processor instruction execution.

Instruction... Continue reading "Microprocessor Techniques: Binary Codes and Instruction Execution" »

Code in MIPS to add the 4 integer variables: a, b, c, d.

Add e,a,b # a gets b+c or a,b,c # a gets b+c

Add e,e,c # a gets a+dor a,a,c, # a gets a+d

Add e,e,d # a gets a+ eor a,a,e # a gets a+e

Code in MIPS for: f = (g + h) ‐ (i + j);

or #f,.., j are mapped to $s0, ., $s4
add t0,g,h #temp t0=g+hadd $t0,$s1,$s2

add t1,i,j #temp t1=i+jadd $t1,$s3,$s4

sub f,t0,t1 #f=t0-t1sub $s0,$t0,$t1

Why the size of a register is 32 bit?

32 bit occurs frequently and thus in MIPS, it has a special name ‘word’. Size 32 aligns well with the MIPS instruction format.

‘MIPS is Big Endian’ – what does it mean?

Most significant byte at least address of a word.

What are lw and sw instructions used for?

MIPS data transfer instructions with an address to access particular... Continue reading "MIPS Code Examples and Register Optimization" »

Computer System Components

There are five main hardware components in a computer system: Input, Processing, Storage, Output and Communication devices. These are devices used for entering data or instructions to the central processing unit.

Five basic components of computer system

• Input Unit: Data and instructions must enter the computer system before any computation can be performed on the supplied data. The input unit that links the external environment with the computer system performs this task.
• Output Unit: The job of an output unit is just the reverse of that of an input unit. It supplies information and results of computation to the outside world, linking the computer with the external environment.
• Storage Unit: The data and instructions that

FIR Filters

A Finite Impulse Response (FIR) filter is characterized by its finite-duration impulse response, settling to zero in a finite time. Unlike Infinite Impulse Response (IIR) filters, which can have internal feedback and respond indefinitely, an Nth-order discrete-time FIR filter's impulse response lasts precisely N+1 samples. FIR filters are predominantly implemented in software and can be continuous-time analog or digital and discrete-time.

Transfer Function of FIR Filter

Frequency Response

IIR Filters

An Infinite Impulse Response (IIR) filter is a recursive filter where the output is calculated using current and previous inputs and outputs. This feedback mechanism within the filter structure is a defining characteristic. IIR filter design... Continue reading "FIR vs. IIR Filters: Advantages, Disadvantages, & Structures" »

What is a Basic Block?

A basic block is a sequence of instructions with no embedded branches (except at the end) and no branch targets (except at the beginning). A compiler identifies basic blocks for optimization. An advanced processor can accelerate the execution of basic blocks.

Six Steps Involved in Procedure Calling

1. Place parameters in registers.
2. Transfer control to the procedure.
3. Acquire storage resources.
4. Perform the desired operation.
5. Place the result in a register for the caller.
6. Return to the point of origin.

Register Saving Responsibilities

Between the caller and callee, the responsibility for saving registers is as follows:

• Temporary registers ($t*): Can be overwritten by the callee.
• Saved temporary registers ($s*): Saved and restored by the

Dynamic Table Generator

ROW:
COL: