Introduction to Computer Systems and Assembly Language Programming

Computer System

Components:

• CPU
• Memory (ROM/RAM)
• I/O unit

BCD (Binary-Coded Decimal)

• Add 0110 to the result if it falls between 1010 and 1111.

Overflow

• Occurs when both numbers being added are positive or negative, and the result exceeds the maximum representable value.

IEEE-754 Standard

• 32 bits: 1 sign bit, 8 exponent bits, 23 mantissa bits
• NAN (Not a Number): Represents an error, exponent with all 1s and a sign bit of 0.
• Always add trailing zeros to complete the required number of bits.

Decoder

• Converts input to output using 2^n AND gates.

Memory

• Components: Address, data, enable, read, write

Control Unit

• Hardware instruction logic
• Decodes and monitors the execution of instructions.

ALU (Arithmetic Logic Unit)

• Performs numerical and logical evaluations.
• Receives data from memory and executes instructions.

Bus

• Strips of wire connecting CPU, memory, and I/O.
• Data bus: Bidirectional, larger size indicates better CPU performance but higher cost.
• Address bus: Unidirectional, 2^n memory locations (n = number of bits), larger size allows for addressing more memory locations.
• Control bus: Carries read/write signals, enabling the CPU to get/send data.

Registers

• Store temporary data.
• WREG (Working Register): 8-bit accumulator, stores results of arithmetic and logic operations.
• Data Register: Holds intermediate results of a task.
• Address Register: Stores the address of operands.
• Stack Pointer: 5-bit register pointing to the top of the stack, stored in RAM, used for PUSH/POP operations, follows LIFO (Last-In, First-Out) order.
• Flag Register: Stores the outcome of arithmetic operations.
• Instruction Register: Holds the instruction currently being executed or decoded.

Program Counter

• Stores the address of the instruction to be executed in the next cycle.

Von Neumann Architecture

• Uses the same address space for both ROM and RAM.

Harvard Architecture

• Uses separate address spaces and buses for ROM and RAM, allowing simultaneous access but increasing cost.

Microcontrollers

• Integrated circuits containing a microprocessor, memory, and I/O ports connected by a bus.

PIC18 Microcontroller

• Based on the Harvard architecture.
• Components: ALU, registers, control unit.
• 32K program memory with an address range of 000000 to 007FFF.
• 4K data memory with an address range of 000 to FFF.
• 77 instructions with a 16-bit word length (except for 4 instructions with a 32-bit length).
• Instruction size: 2 bytes or 4 bytes.

Banks in Data Memory

• Divided into 16 banks, each containing 256 bytes (128 GPRs and 128 SFRs).
• GPR (General Purpose Register): Storage for variables in the program.
• SFR (Special Function Register): Controls the operation of the CPU.

Bank Switching

• Allows programs requiring more RAM to access memory beyond the current bank.

Flags

• N (Negative): Set when bit 7 of the result is set after an arithmetic or logic operation.
• OV (Overflow): Set if the result of an operation exceeds 7 bits.
• C (Carry): Set if there's a carry from the most significant bit during addition.
• DC (Digit Carry): Set if there's a carry from bit 3 to bit 4.
• Z (Zero): Set if the result of an operation is 0.

Assembly Syntax

[label:] mnemonic [operands] [;comment]

Directives

• ORG: Tells the assembler to place the opcode at the specified ROM address (e.g., ORG 0H).
• EQU: Defines a constant number with a label (e.g., COUNT equ 0x25 | MOVLW COUNT).
• SET: Similar to EQU, but the value can be reassigned.
• CLBLOCK: Defines a list of named constants.

Instructions

• MOVLW: Moves a literal value (8-bit data) to the WREG. Prefixes for literal values: B (binary), D/. (decimal), H/0x/h' ' (hexadecimal).
• ADDLW: Adds a literal value to the WREG.
• MOVWF: Copies the content of the WREG to a destination file register.
• COMF: Complements the content of a file register and stores the result in the WREG.
• DECF: Decrements the content of a file register and stores the result in the WREG.
• MOVF: Moves the content of a file register to the WREG.
• MOVFF: Copies the content of one location in a file register to another.

RISC (Reduced Instruction Set Computing)

• Increases the clock frequency of the chip.
• Often uses the Harvard architecture.
• May switch to an internal RISC architecture.

Subroutines

• Groups of instructions performing specific tasks, independent of the main program.
• Can be called and returned from.

Subroutine Instructions

• RCALL n: Increments the stack pointer, stores the return address (PC+2) on the stack, and branches to the specified label within a range of -2048 to +2046.
• RETURN: Returns from a subroutine.
• RETLW: Returns a literal value to the WREG, retrieves the return address from the stack, places it in the PC, decrements the stack pointer, and returns the 8-bit literal to the WREG.

Branch and Loop Instructions

• Branch loop: Used for loops in PIC microcontrollers, including nested loops.
• DECFSZ: Decrements a register and skips the next instruction if the result is 0. The maximum number of loop iterations is 256.
• BNZ/BZ: Jumps to a target address if the previous result is not zero/zero.
• BNC: Jumps if there's no carry flag set.
• BRA: 2-byte instruction, relative branching within a range of -2048 to +2046 bytes.
• GOTO: 4-byte instruction, jumps to any location in program memory.
• CALL: 4-byte instruction, calls a subroutine.

Process of Calling a Subroutine

1. The CALL instruction is executed.
2. The CPU pushes the current PC (Program Counter) onto the stack.
3. The CPU copies the target address of the subroutine into the PC.
4. The CPU starts fetching instructions from the new location (subroutine).
5. When the RETURN instruction is fetched, the subroutine ends.
6. The CPU pops the return address from the stack.
7. The CPU copies the return address back into the PC.
8. The CPU resumes fetching instructions from the original location (after the CALL instruction).

Unpacked BCD Number

• One byte is used to store a single BCD digit.
• Example: 0000 0101 represents the decimal number 5.

Packed BCD Number

• Two BCD digits are packed into a single byte.
• Example: 0101 1001 represents the decimal number 59 (0101 = 5, 1001 = 9).

Adding Packed BCD Numbers

• Use the ADD and ADDC instructions.
• Example: Adding 17 (0001 0111) + 18 (0001 1000) = 35 (0011 0101)
• If the resulting low-order byte is greater than 9 or if there's a carry from bit 3 to bit 4, add 6 to the low digit to get the correct packed BCD sum.