Boolean Algebra and Logic Gates: A Concise Overview

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Written at March 24, 2025 on English with a size of 12.3 KB.

Boolean Algebra

SUM

0 + 0 = 0

1 + 1 = 1

0 + 1 = 1

1 + 0 = 1

MULTIPLICATION

COMPLEMENTATION

= 1

= 0

Example with other signs:

MORGAN'S THEOREM

Common Factor

Exercises:

Logic Gates

NOT Gate (Inverter)

This is an operation that only handles one input variable and an output. The output takes the opposite or inverse state as the entry.

Truth Table for NOT Gate

INPUT VALUE	OUTPUT VALUE
0	1
1	0

OR Gate (Sum)

When different variables are combined using the logical OR function, the result takes the high state, true or 1 if any of them have this condition. The equation representing the OR function of two input variables is:

X = A + B

Truth Table for OR Gate

VALUE IN PART A	VALUE IN PART B	Values obtained from the OUTPUT
0	0	0
0	1	1
1	0	1
1	1	1

NOR Gate (Inverting Summer)

This gate produces the inverse of the OR gate, i.e., the negation of the logical sum of the input variables. Their behavior is equivalent to the OR gate followed by NOT.

Truth Table for NOR Gate

VALUE IN PART A	VALUE IN PART B	Values obtained from the OUTPUT
0	0	1
0	1	0
1	0	0
1	1	0

AND Gate (Multiple)

When several logical variables of binary type are combined using the logical AND operation, producing an output variable, which only takes the logic level 1, high or true state, if they all have that level or state. Equation logic AND function for two input variables is:

Truth Table for AND Gate

VALUE IN PART A	VALUE IN PART B	Values obtained from the OUTPUT
0	0	0
0	1	0
1	0	0
1	1	1

NAND Gate (Inverting Multiple)

The NAND gate produces the inverse function of the AND, or denial of the logical product of the input variables. It acts as an AND gate followed by NOT.

Truth Table for NAND Gate

VALUE IN PART A	VALUE IN PART B	Values obtained from the OUTPUT
0	0	1
0	1	1
1	0	1
1	1	0

XOR Gate (OREX)

The output of this gate is 1, high or true state if each entry is 1 but excludes the combination when both inputs are 1. The exclusive OR function has its own graphic symbol can be expressed in terms of complementary operations AND, OR.

Truth Table for XOR Gate

VALUE IN PART A	VALUE IN PART B	Values obtained from the OUTPUT
0	0	0
0	1	1
1	0	1
1	1	0

XNOR Gate (Norex)

Truth Table for XNOR Gate

VALUE IN PART A	VALUE IN PART B	Values obtained from the OUTPUT
0	0	1
0	1	0
1	0	0
1	1	1

Exercises:

Deploy only with NAND gates: NOT, OR, NOR and AND.

OR NOT

AND NOR

Deploy only with NOR gates: NOT, OR, NAND and AND

OR NOT

NAND AND

Implement single NAND OREX door.

Implement the door only with NOR OREX

Implement the door only to NAND Norex

Implement the NOR gate only to Norex

Deploy And Implement NAND + W Y + W with NOR

Implement with AND

Implement with NOR

Exercises Sheet1:

Get the output signal simplified. Implement the exit doors and simplified.

Scheme 1