Notes, summaries, assignments, exams, and problems for Computers

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Theory of Computation: Automata, and Regular Expressions

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Theory of Computation

Automata Theory

Automata theory is a theoretical branch of computer science and mathematics that deals with the logic of computation using simple machines called automata. The main goal of automata theory is to develop methods for describing and analyzing the dynamic behavior of discrete systems. Automata consist of states (represented by circles) and transitions (represented by arrows).

Finite Automata

A finite automaton is an abstract computing device and a mathematical model of a system with discrete input, output, states, and a set of transitions between states that occur on input symbols from an alphabet. Finite automata are the simplest machines for pattern recognition, used to characterize regular languages, analyze... Continue reading "Theory of Computation: Automata, and Regular Expressions" »

Data Manipulation and Visualization with R and the nycflights13 Dataset

Classified in Computers

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library(nycflights13)
library(tidyverse)

Data Manipulation with dplyr

Ordering Rows with arrange()

arrange(flights, year, month, day)
arrange(flights, desc(arr_delay))

Handling NAs

df <- tibble(x = c(5, 2, NA))
arrange(df, x)
arrange(df, desc(x))

Selecting Columns with select()

select(flights, year, month, day)
select(flights, year:day)
select(flights, -(year:day))
rename(flights, mes = month)
select(flights, time_hour, air_time, everything())

Creating New Variables with mutate()

flights_sml <- select(flights, year:day, ends_with("delay"), distance, air_time)
mutate(flights_sml, gain = arr_delay - dep_delay, speed = distance / air_time * 60)

Creating Functions with Vector Arguments

transmute(flights, dep_time, hour = dep_time %/% 100, minute = dep_time %
... Continue reading "Data Manipulation and Visualization with R and the nycflights13 Dataset" »

Asteriscos, Ceros, Sheet Title, Code Sample, Romanos

Classified in Computers

Written on in English with a size of 6.68 KB

ASTERISCOS
DIM T, A, LETRA AS STRING
CLS
= ""
PRINT "DAME UN TEXTO"
DO
    SLEEP
    LETRA = INKEY$
    IF ASC(LETRA) <> 13 THEN
        PRINT "*";
        A = A + LETRA
    END IF
LOOP UNTIL ASC(LETRA) = 13
LOCATE 3, 2
PRINT A

CEROS

= 0
= 0
DO
    CO = N \ 10
    R = N MOD 10
    IF R <> 0 THEN
        S = S + R * (10 ^ C)
        C = C + 1
    END IF
    N = CO
LOOP UNTIL CO = 

heet Title

CLS
DO
    PRINT "DAME UN TEXTO"
    INPUT T
    L = LEN(T)
LOOP UNTIL L > 0
= ""
FOR P = 1 TO L
    LETRA = MID$(T, P, 1)
    SELECT CASE UCASE$(LETRA)
        CASE IS = "A", "E", "I", "O", "U"
            A = A + "*"
        CASE ELSE
   
... Continue reading "Asteriscos, Ceros, Sheet Title, Code Sample, Romanos" »

Digital Logic Design: Examples in VHDL

Classified in Computers

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Behavioral Architecture of a State Machine

This VHDL code describes the behavioral architecture of a state machine.

TYPE tipo_estado IS (DET0, DET0a1, DET1a0, DET1);
signal Estado_actual : tipo_estado;
signal Estado_siguiente : tipo_estado;
begin
Registro_estado: process (clk, reset)
begin
if reset='1' then Estado_actual <= DET0;
elsif (clk'event and clk='1') then
Estado_actual <= Estado_siguiente;
end if;
end process Registro_estado;
Cambio_Estado: process (Dato, Estado_actual)
begin
Estado_siguiente <= Estado_actual;
case Estado_actual is
when DET0 => if (Dato='1') then Estado_siguiente <= DET0a1;
else Estado_siguiente <= DET0;
end if;
when DET0a1 => if (Dato='1') then Estado_siguiente <= DET1;
else Estado_siguiente <= DET1a0;
end if;
... Continue reading "Digital Logic Design: Examples in VHDL" »

Microcontrollers: Architecture, Instruction Sets, and Interfacing

Classified in Computers

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Microcontrollers, Microcomputers, and Microprocessors

Microcontroller: Processor, memory, and I/O ports integrated on a single chip.

Microcomputer: A small computer.

Microprocessor: Example: Intel x86.

Von Neumann Architecture

Components:

  • Processor (Control Unit, ALU, Registers)
  • Memory (RAM - Volatile, ROM - Non-Volatile)
  • I/O

A single bus interconnects the processor, memory, and I/O.

RISC vs. CISC

FeatureCISCRISC
Instruction SetComplex Instruction Set ComputerReduced Instruction Set Computer
InstructionsMulti-cycle, complex instructionsMostly single-cycle, reduced instructions
Instruction TypesMany, varying lengthFew, fixed length
ComplexityHardwareSoftware
Code SizeSmallLarge
ExamplesIntel (x86), Freescale 9S12MIPS, ARM, SPARC, PowerPC

RAM vs. ROM vs. CPU Register

FeatureRAMROM
ElaborationRandom
... Continue reading "Microcontrollers: Architecture, Instruction Sets, and Interfacing" »

Pascal Movie Database Management Procedures

Classified in Computers

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Pascal Movie Database Management

This document details several procedures written in Pascal for managing a movie database. The database is stored in a file of records, where each record represents a movie.

Data Structure

The code defines a pelicula (movie) record with the following fields:

  • codigo: integer (Movie ID)
  • genero: string (Genre)
  • nombre: string (Title)
  • duracion: integer (Duration)
  • director: string (Director)
  • copias: integer (Number of Copies)
  • precio: real (Price)

A constant valoralto is defined as 9999, used as a sentinel value.

And the file is defined as:

maestro= file of pelicula ;

Procedures

leerp(var p: pelicula)

Reads movie data from the input (keyboard) and stores it in the pelicula record p. It reads the codigo first. If it's not equal to... Continue reading "Pascal Movie Database Management Procedures" »

VHDL Implementations for Digital Logic Components

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VHDL Flip-Flop Implementations

This section demonstrates various VHDL implementations of flip-flops and latches, showcasing different clocking, clear, preset, and load mechanisms.


entity reginf is
    port (
        d, clk, clr, pre, load, data : in  std_logic;
        q1, q2, q3, q4, q5, q6, q7   : out std_logic
    );
end reginf;

architecture rtl of reginf is
begin

Active High Clock D-Latch

A simple D-latch sensitive to the rising edge of the clock.


    -- D-latch with active high clock
    process
    begin
        wait until clk='1';
        q1 <= d;
    end process;

Active Low Clock D-Latch

A D-latch sensitive to the falling edge of the clock.


    -- D-latch with active low clock
    process
    begin
        wait until clk='0';
... Continue reading "VHDL Implementations for Digital Logic Components" »

3-D Cube Transformations in OpenGL

Posted by aditya dani and classified in Computers

Written on in English with a size of 2.54 KB

Write C++/Java program to draw 3-D cube and perform following transformations on it using OpenGL.

Scaling

#include // Include the GLUT header file

void display (void) {

glClearColor(0.0f, 0.0f, 1.0f, 1.0f); // Clear the background of our window to blue

glClear(GL_COLOR_BUFFER_BIT); // Clear the colour buffer (more buffers later on)

glLoadIdentity(); // Load the Identity Matrix to reset our drawing locations

glTranslatef(0.3f, 0.3f,-6.0f); // Push everything 5 units back into the scene, otherwise we won't see the primitive

//glScalef(0.5f, 1.0f, 2.0f); // Make the shape half as wide, the same height and twice as deep

glutWireCube(2.0f); // Render the primitive

glLoadIdentity(); // Load the Identity Matrix to reset our drawing locations

glTranslatef(0.0f,... Continue reading "3-D Cube Transformations in OpenGL" »

Methods for Storing Data in a Database

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Different Means of Storing Data

  • Regular Table
  • Partitioned Table
  • Index-Organized Table
  • Clustered Table

Regular Table

A regular table, generally referred to as a 'table', is the most commonly used form of storing user data. The database administrator has very limited control over the distribution of rows in an un-clustered table. Rows can be stored in any order depending on the activity on the table.

Partitioned Table

A partitioned table enables the building of scalable applications. It has one or more partitions, each of which stores rows that have been partitioned using range partitioning, hash partitioning, composite partitioning, or list partitioning. Partitions are useful for large tables that can be queried or manipulated using several processes... Continue reading "Methods for Storing Data in a Database" »

Understanding Mobile Development: The Viewport Meta Tag

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Mobile Development: The Viewport Meta Tag

The viewport meta tag is crucial for responsive web design on mobile devices. It controls how the browser displays a webpage on different screen sizes. Here's a breakdown of its key attributes:

Key Attributes

  • width: Defines the viewport width. Typically set to device-width, which matches the device's screen width.
  • initial-scale: Sets the initial zoom level. A value of 1 ensures the webpage is displayed at 100% zoom initially.
  • user-scalable: A boolean attribute. Setting it to no prevents users from zooming in or out.