Notes, summaries, assignments, exams, and exercises for Computer science for University

Performance Metrics

• Elapsed Time: Represents overall system performance. It is the total time taken to complete a task.
• User CPU Time: Indicates CPU performance. It is the time the task actively runs on the CPU, excluding idle time.
• CPU Time: The time the CPU spends executing instructions, either from the task or the operating system, excluding idle time.
• Clock Speed: 1 MHz equals 1 million clock cycles per second. 1 GHz equals 1 billion clock cycles per second.
• Response Time: Equivalent to execution time.
• Throughput: Equivalent to bandwidth.
• Performance Comparison: (PerfA) / (PerfB) = (ExecTimeB) / (ExecTimeA) = n

Impact of Processor Upgrades

• Replacing a processor with a faster one decreases response time and increases throughput.
• Adding an additional

1. Client Initiation and DNS Lookup

• The user enters a URL or clicks a link in the browser. The browser parses the URL and extracts the domain (e.g., www.example.com).

• A **DNS lookup** translates this domain into an IP address—acting like a digital phonebook entry.

2. Establishing the TCP Connection

The browser’s operating system (OS) creates a socket and initiates the **TCP three-way handshake** with the server:

1. SYN: Client sends a synchronization request to the server.
2. SYN-ACK: Server acknowledges the request and sends its own synchronization.
3. ACK: Client acknowledges the server's response.

Once this handshake is complete, a full-duplex TCP connection is open and ready for reliable data exchange.

3. Sending the HTTP Request Message

The client constructs...

Processor & Memory Interface

Processor & Memory Interface: The maximum size of the memory that can be used in any computer is determined by the addressing scheme. For example, a computer that generates 16-bit addresses is capable of addressing up to 2¹⁶ = 65,536 (≈ 64K) memory locations. Machines whose instructions generate 32-bit addresses can utilize a memory that contains up to 2³² = 4,294,967,296 (≈ 4G) locations, whereas machines with 64-bit addresses can access up to 2⁶⁴ ≈ 1.84 × 10¹⁹ locations. The number of locations represents the size of the address space of the computer.

The connection between the processor and its memory consists of address, data, and control lines. The processor uses the address lines to specify the...

Matrix Operations and Linear Equations in MATLAB

Format short, long format, format rat (format is the x / y), format short (as is 3 * 10^-5 = 3e-5). A = [; ;]. To extract a positive one: A(2,2). Changing a number in one position: A(row, column) = number in that position.

Write a whole line: A(row,:). or A(row, 2:4) - the columns you want from that row. For columns it is the same but in reverse: A(:, 3:7). Extract a submatrix A(2:3, 2:3) - ever-growing range. Transpose: A.'. Conjugate matrix (star A*): A'. Matrix for blocks: [A | E] - like n-th row or [A; E] - so I place it under.

Matrix by number unit: 23 * ones(3). Identity: eye(x, y).

Systems of Linear Equations Ax = b:

• Rank(A) = rank(A | b) = No incog. - SCD: x = A \ b
• Rank(A) = rank(A | b)

Can the Priority Inversion Problem Happen with User-Level Threads?

The priority inversion problem occurs when a low-priority process is in its critical region and suddenly a high-priority process becomes ready and is scheduled. With user-level threads, it cannot happen that a low-priority thread is suddenly preempted to allow a high-priority thread to run. There is no preemption. With kernel-level threads, this problem can arise.

Does Round-Robin Scheduling Resolve Priority Inversion?

Round-robin scheduling can resolve the issue. Sooner or later, the low-priority process will run and eventually leave its critical region. With priority scheduling, the low-priority process never gets to run at all; with round-robin, it gets a normal time slice periodically,...

What is a Cheat Sheet? Definition and Terminology

A cheat sheet or crib sheet is a concise set of notes used for quick reference. The term may also be rendered as cheatsheet.

Academic Use and Exam Preparation

Cheat sheets are so named because they may be used by students without the instructor's knowledge to cheat on a test. However, in many educational settings, particularly high school or undergraduate studies, rote memorization is often less important than basic education or intense graduate studies. Therefore, students may be permitted to consult their own notes during the exam, which is not considered cheating.

The act of preparing a so-called cheat sheet is also an educational exercise. For this reason, students are typically only allowed...

Sorting Algorithms and Their Bounds

Results like the Ω(nlgn) lower bound on all sorting via binary comparisons are difficult to establish. On the other hand, results like the O(n2) upper bound on INSERTION-SORT are easier to achieve. Explain adequately the difference in the “ease” of arriving at these results.

One result applies to all sorting algorithms that are based on binary comparisons (and so is harder to establish) while the other result is simply for one specific sorting algorithm in the same category. A more complete answer would involve an argument that rightly recognizes that the lower bound result is one that also applies to algorithms that exist and also those yet to be devised (yes, even those that may be written a hundred...

CPU Terminals and Bus Interconnection

The terminals (pins) of a Central Processing Unit (CPU) are typically divided into three main types: Address, Data, and Control.

These terminals are connected to similar terminals on memory chips and Input/Output (I/O) devices. This interconnection is collectively known as the bus system.

Communication between the CPU, memory, and I/O devices is effective through both transmitting and receiving signals at these terminals.

Key Bus Parameters

The functionality of the bus system is defined by three basic parameters:

• Address Lines: A chip that has m address lines can address up to 2^m memory locations.
• Data Lines: A chip that has n data lines can write or read a word of n bits in a single operation.
• Control Lines: These

🧾 Data Transfer Instructions

These instructions are used to move data between registers, memory, and I/O ports.

➕ Arithmetic Instructions

These instructions perform basic mathematical operations.

10LayerModelSecurity,10Security policies and mandates.9,Oversight of end-to-end processes to ensure compliance with enterprise security policies. Audit trails for the threads.8Security roles and responsibilities. Standard security practices as they relate to activities and exchanges. Security Architecture. Personnel security requirements. 3.10. Management7Application service security (e.g., integrity of the service and application code) and content security (e.g., security labels). Security of user access to IT. Privilege management. 6Framework service security (e.g., integrity of the service and application code of the framework). Content security labeling service and label checking service. Software-based content encryption/decryption services...